= CRC =
A cyclic redundancy check (CRC) is an error-detecting code.

http://en.wikipedia.org/wiki/Cyclic_redundancy_check

http://en.wikipedia.org/wiki/Computation_of_cyclic_redundancy_checks 

http://www.drdobbs.com/implementing-the-ccitt-cyclical-redundan/199904926

http://www.ietf.org/rfc/rfc1952.txt

http://www.feng.pucrs.br/~stemmer/processadores2/trab2-2012-2/crc.html

== HDLC like framing ==
The http://www.ietf.org/rfc/rfc1662.txt has two examples of CRC calculations.

Polynom CRC-16: 0x8408 ( CRC-16-CCITT Reversed )

Polynom: x^0^ + x^5^ + x^12^ + x^16^

== CRC-16-IBM ==
Bisync, Modbus, USB, ANSI X3.28, SIA DC-07, many others; also known as CRC-16 and CRC-16-ANSI

Polynom: x^16^ + x^15^ + x^2^ + 1

||Normal||Reversed||Reversed reciprocal||
||0x8005||0xA001||0xC002||

{{{#!highlight python
    def crc16ANSI(self,message):
        crc = 0x0000
        bitOne=0x0001
        crcpoly=0xA001
        idx = 0
        while idx < len(message):
            origByte = ord(message[idx])
            bitCounter = 0
            
            while bitCounter < 8:
                crcFirstBit=(crc & bitOne)
                origByteFirstBit=(origByte & bitOne)                
                crcShiftRight=crc >> 1                
                #check if first bit of crc is different than the first of the original byte 
                if(crcFirstBit ^  origByteFirstBit== 1):
                    crc = crcShiftRight ^ crcpoly
                else:
                    crc = crcShiftRight                    
    
                bitCounter = bitCounter + 1
                origByte = origByte >> 1
                
            idx = idx + 1
                    
        res=crc & (0xFFFF)        
        return res
'''
'A' 0x30C0
'ABC'  0x4521       
'THE,QUICK,BROWN,FOX,0123456789' 0xB96E 
'''
}}}